안녕하세요.
2026년 3월 18일 (수), 연세대학교 정한울 교수님을 모시고 세미나를 진행합니다.

지속가능 IT 기술 세미나는 IT 기술의 지속 가능성과 관련한 최신 연구 및 동향을 다루는 강의로, 다양한 전공 분야의 전문가를 초빙하여 깊이 있는 강연을 제공합니다.

관심 있는 학생 여러분의 많은 참여 바랍니다.

[세미나 상세 정보]

• ■일시: 2026년 3월 18(수) 17:00 ~ 17:50
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• ■장소: 제1공학관 23동 23219호
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• ■연사: 정한울 교수님 (연세대학교)

■주제: Machine Learning for Memory Circuits: Bayesian Optimization in Embedded Memory Design

■Abstract

:  As embedded memory becomes increasingly dominant in modern integrated systems, efficient circuit design methodologies are essential to handle growing complexity and tight design constraints. Conventional design approaches rely heavily on manual tuning and repeated simulations, which limits scalability.

This seminar presents a machine learning-based design automation framework for embedded memory circuits, based on Bayesian optimization techniques. the framework models circuit performance as a probabilistic function and iteratively selects promising design candidates to accelerate optimization.

By integrating Bayesian learning with circuit simulation workflows, the proposed methodology significantly reduces the number of required simulations while achieving high-quality design solutions. Case studies demonstrate its effectiveness in optimizing key memory circuit parameters under process variation and design constraints.

The seminar concludes with a discussion on the future of AI-assisted circuit design, particularly for memory-dominated system architectures.

■Bio

: Hanwool Jeong is a professor in the Department of Electrical and Electronic Engineering at Yonsei University and the Founder and CEO of ARTICRON, a semiconductor IP company focused on AI accelerators and memory-centric computing technologies. Prior to academia, he worked at the Samsung Electronics Foundry Division, where he was involved in the circuit design and verification of advanced-node memory compiler and gained experience in large-scale semiconductor design environments.

His research lies at the intersection of memory circuits, computing architectures, and semiconductor design automation, with the goal of improving energy efficiency and computational scalability in AI hardware. His work spans memory circuit design, low-voltage and low-power digital logic, neuromorphic and machine-learning hardware, and hardware–software co-design for AI accelerators.

He has been particularly active in developing memory-centric computing architectures, including NPU architectures and Processing-in-Memory (PIM) based on embedded memories such as SRAM and emerging memory technologies. His research also explores automated design methodologies for embedded memory IP and digital circuits, enabling scalable development of high-performance semiconductor systems for edge AI and next-generation computing platforms.

• ■HOST: 전정훈 교수 (現 정보통신대학장 / 반도체시스템공학과)