[세미나 안내] CISPA Dr. Abdullah Giray 초청 세미나 (10/23 목 10:00, 반도체관 400112호) "Mitigating and Breaking RowHammer in Modern DRAM-based Systems"
- ice
- 조회수213
- 2025-10-22
CISPA Helmholtz Center for Information Security의 Dr. Abdullah Giray를 모시고 세미나를 진행합니다.
Giray 박사님은 ETH Zürich에서 Onur Mutlu 교수 지도하에 박사학위를 취득하였고, RowHammer 및 DRAM 취약성 분야에서 활발히 연구하고 있습니다. MICRO 참석차 방한하여 성균관대와 서울대를 방문, 국제 교류를 겸해 세미나를 진행합니다. DRAM/RowHammer 및 보안에 관심 있는 교수님과 학생 여러분의 많은 참여 바랍니다.
■일시: 2025년 10월 23일(목) 오전 10:00
■장소: 반도체관 400112호
■주제: Mitigating and Breaking RowHammer in Modern DRAM-based Systems
■연사: Dr. Abdullah Giray (CISPA)
■ABSTRACT
Read disturbance in modern DRAM is a significant robustness (security, safety, and reliability) issue, where repeatedly accessing (hammering) a row of DRAM cells (DRAM row) induces bitflips in other physically nearby DRAM rows. To make matters worse, shrinking technology node size exacerbates DRAM read disturbance at the circuit level over generations. Worsening DRAM read disturbance leads to data integrity issues, and existing read disturbance mitigations greatly reduce the availability of DRAM chips. In this talk, I will cover two of our recent works: Chronus and BreakHammer, tackling data integrity issues caused by DRAM read disturbance at low overhead on DRAM chips’ availability.
Chronus 1) updates PRAC’s row activation counters concurrently while serving accesses by separating counters from the data, and 2) prevents the worst-case access pattern against PRAC (known as wave or feinting attack) by dynamically controlling the number of preventive refreshes performed. Our performance analysis shows that Chronus’s system performance overhead is near-zero for modern DRAM chips and very low for future DRAM chips. Chronus outperforms three variants of PRAC and three other state-of-the-art read disturbance solutions. We discuss the implications of Chronus and PRAC for future systems and foreshadow future research directions. To aid future research, we open-source our Chronus implementation at https://github.com/CMU-SAFARI/Chronus.
BreakHammer 1) observes the time-consuming RowHammer-preventive actions of existing RowHammer mitigation mechanisms, 2) identifies hardware threads that trigger many of these actions, and 3) reduces the memory bandwidth usage of each identified thread. As such, BreakHammer significantly reduces the number of RowHammer-preventive actions performed, thereby improving 1) system performance and DRAM energy, and 2) reducing the maximum slowdown induced on a benign application, with near-zero area overhead. Our evaluations demonstrate that BreakHammer effectively reduces the negative performance, energy, and fairness effects of eight RowHammer mitigation mechanisms. To foster further research, we open-source our BreakHammer implementation and scripts at https://github.com/CMU-SAFARI/BreakHammer.
■BIO
Giray is a tenure-track faculty member at CISPA and is looking forward to hiring young researchers at various levels. His broader research interests span high-performance, energy-efficient, and secure computer architectures, aiming for robust and sustainably scalable systems. His research is published in major venues, including HPCA, MICRO, DSN, ISCA, and USENIX Security. Giray’s PhD research builds 1) a detailed understanding of DRAM read disturbance, a major limitation of main memory density scaling, and 2) mechanisms that efficiently and scalably mitigate DRAM read disturbance. His PhD dissertation was awarded the William C. Carter PhD Dissertation Award in Dependability in 2025 and is recognizedas a finalist by HOST, ACM SIGARCH/IEEE CS TCCA, and IEEE TTTC’s E. J. McCluskey Best Doctoral Dissertation awards. Giray’s research is in part 1) supported by Google Security and Privacy Research Award and Microsoft Swiss Joint Research Center, and 2) recognized by ETH Medal (nominated), Intel Hardware Security Academic Award 2022 (chosen as a finalist), and ACM PACT Student Research Competition 2023 (won the first place).
■HOST: 김정래교수 (전자전기컴퓨터공학과)
발전기금


